• Co-Director of Graduate Programs, Electrical & Computer Engineering
  • Professor, Electrical & Computer Engineering
  • Eric D. Rubin '06 Endowed Professor
  • Affiliated Faculty, Computer Science & Engineering
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Jiang Hu

Educational Background

  • Ph.D., Electrical Engineering, University of Minnesota – 2001
  • M.S., Physics – 1997
  • B.S., Optical Engineering, Zhejiang University – 1990

Research Interests

    • Electronic design automation
    • Machine learning for chip design
    • Artificial intelligence (AI) hardware optimization
    • Computer architecture
    • Hardware security

Certifications & Memberships

  • Fellow, Institute of Electrical and Electronics Engineers (IEEE)

Awards & Honors

  • Editor-in-Chief, Association for Computing Machinery (ACM) Transactions on Design Automation of Electronic Systems – 2024-2027
  • General co-chair, Association for Computing Machinery(ACM)/Institute of Electrical and Electronics Engineers (IEEE) International Symposium on Machine Learning for Computer-Aided Design (CAD) – 2024, 2025
  • Best Paper Award, Institute of Electrical and Electronics Engineers (IEEE)/Association for Computing Machinery (ACM) International Symposium on Microarchitecture – 2021
  • Best Paper Award, Institute of Electrical and Electronics Engineers (IEEE)/Association for Computing Machinery (ACM) International Conference on Computer-Aided Design – 2011
  • Best Paper Award, Association for Computing Machinery (ACM)/Institute of Electrical and Electronics Engineers (IEEE) Design Automation Conference – 2001

Selected Publications

  • P. Sengupta, A. Tyagi, Y. Chen and J. Hu, “How Good is Your Verilog RTL Code? A Quick Answer from Machine Learning,” IEEE/ACM International Conference on Computer-Aided Design, 2022.
  • R. Liang, J. Song, B. Yuan and J. Hu, “Deep Learning Toolkit-Accelerated Analytical Co-optimization of CNN Hardware and Dataflow,” IEEE/ACM International Conference on Computer-Aided Design, 2022.
  • Z. Xie, Y.-H. Huang, G.-Q. Fang, H. Ren, S.-Y. Fang, Y. Chen and J. Hu, “RouteNet: Routability Prediction for Mixed-Size Designs Using Convolutional Neural Network,” IEEE/ACM International Conference on Computer-Aided Design, 2018.
  • Y. Wang, P. Chen, J. Hu, G. Li and J. Rajendran, “The Cat and Mouse in Split Manufacturing,” IEEE Transactions on VLSI Systems, Vol. 26, No. 5, May 2018.
  • A. Rajaram, J. Hu and R. Mahapatra, “Reducing clock skew variability via cross links,” IEEE Trans. Computer-Aided Design, Vol. 25, No. 6, pp. 1176-1182, June 2006.
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