Paul Gratz

Educational Background

Ph.D., Electrical and Computer Engineering, The University of Texas at Austin – 2008

- Security, power, reliability and performance in multicore and distributed computer architectures
- Processor memory systems
- On-chip interconnection networks

S. Gupta, S. Mostofi, A. Hassani, K. Tibrewala, E. Teran, P. V. Gratz, and D. A. Jimenez. Light-weight Cache Replacement for Instruction Heavy Workloads. Proceedings of the IEEE/ACM International Symposium on Computer Architecture (ISCA), June 2025. Acceptance rate: 23%.
C. Pepi, B. R. Godala, K. Tibrewala, G. A. Chacon, P. V. Gratz, D. A. Jiménez, G. A. Pokam, and D. I. August. Skia: Exposing Shadow Branches. Proceedings of the 2025 ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Apr. 2025. Acceptance rate: 12%.
E. C. Barboza, M. Ketkar, P. V. Gratz, and J. Hu. Aiding Microprocessor Performance Validation with Machine Learning. Proceedings of the 2024 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), May 2024. Nominated for Best Paper (5/70, top 5.7%).
G. Vavouliotis, G. Chacon, L. Alvarez, P. Gratz, D. Jiménez, and M. Casas. Page Size Aware Cache Prefetching. Proceedings of the IEEE/ACM International Symposium on Microarchitecture (MICRO), Oct. 2022. Acceptance rate: 22%.
M. Parasar, N. Jerger, P. V. Gratz, J. Miguel, and T. Krishna. SEEC: Stochastic Escape Express Channel. Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis (SC21), Nov. 2021. Acceptance rate: 23%. Nominated for Best Paper (6/379, top 1.6%).