A team of computer engineering graduate students from the Texas A&M University Department of Electrical and Computer Engineering earned top honors at one of the most cutting-edge competitions in chip design. Co-hosted by the Design Automation Conference (DAC) and the Institute of Electrical and Electronics Engineers International Conference on LLM-Aided Design (ICLAD), the team took first place at the Generative AI Chip Hackathon.
The hackathon focused on the convergence of large language models (LLMs) and hardware design and was held in conjunction with the 62nd DAC, the premier event for electronic design automation and semiconductor design.
The team — composed of Kevin Tieu, Runzhi Wang and Fenghua Wu — outperformed international competitors in the LLM track for both the Arizona State University Spec2Tapeout and the Google Design Verification Problem. Their entries showcased innovative applications of generative AI and LLMs to transform traditional chip design workflows.
As the complexity of modern chips continues to grow, so does the need for advanced tools to accelerate the design process. This competition tested those ideas, asking participants to automate significant portions of chip development, from natural-language specifications to physical layout.
“Our solution automated the entire frontend-to-backend design flow,” Wang said. “Using LLMs, we could take English-language specs and generate fully routable layout files, which has always been a really labor-intensive and time-consuming process.”
The team also tackled the difficult task of functional verification, using AI to analyze buggy hardware description language code, explain the problems and suggest corrections without human intervention.
Using LLMs, we could take English-language specs and generate fully routable layout files, which has always been a really labor-intensive and time-consuming process.
Their approach involved a multi-agent LLM pipeline, with different AI agents responsible for generating, validating and refining chip designs.
“Instead of relying on a single model, we structured a system where one LLM generates the design, another verifies and suggests improvements, and a third interfaces with design tools to complete the physical implementation,” Wang said.
In the Google Design Verification track, the team’s system had to autonomously detect bugs in mutated register transfer level code using a single testbench, pushing the limits of LLMs in automated verification. Their solution generated diverse input sequences, performed segmented test generation and built a lightweight validation framework using only AI agents.
The team's success was built on a strong research foundation. Kevin Tieu was advised by Dr. Jeyavijayan Rajendran, while Fenghua Wu and Runzhi Wang were mentored by Dr. Jiang Hu. Both professors are recognized leaders in AI-driven hardware research and have long emphasized a hands-on, research-focused approach to graduate education.
“Our faculty have created an environment that encourages experimentation, interdisciplinary thinking, and real-world problem solving,” Wang said. “This competition gave us a chance to bring those skills to the global stage.”